Semiconductor devices are progressively becoming more highly integrated and critical dimensions of patterns have become correspondingly smaller. Generally, it has become increasingly difficult to accurately realize patterns having desirably small critical dimensions using conventional photolithography processes. To transfer a circuit pattern of a mask to a wafer may require resolution sufficient to provide critical dimensions less than an optical wavelength used in a conventional exposure system.
Typically, a pattern for a semiconductor device is formed using a photolithography process. A layout of a pattern of a semiconductor device to be formed on a wafer is designed. A mask may then be fabricated based on the laid-out pattern of the semiconductor device. The mask typically has a structure including a light blocking layer arranged on a transparent substrate. The transparent substrate may include, for example, quartz, and the light blocking layer may include, for example, chrome. A pattern is formed on a semiconductor wafer by performing the photolithography process using the mask.
When a circuit pattern (“transfer circuit pattern”) is formed on a wafer using a photolithography process, there are typically differences between the transfer circuit pattern formed on the wafer and the designed circuit pattern. Such differences may be caused by an optical proximity effect and/or by an etching loading effect. A deviation in the transfer circuit pattern on the wafer may be particularly serious in a pattern having a critical dimension less than the optical wavelength used in the exposure system.
More accurate transfer of a circuit pattern from mask to wafer may be achieved by using a PPC (process proximity correction) technology wherein correction is made by considering a deviation in the transfer circuit pattern formed on the wafer when creating the mask. A conventional PPC technology predicts and analyzes the optical proximity effect and the loading effect and then corrects the layout of the circuit pattern of the mask based on the results of analysis. PPC technology typically uses an OPC (optical proximity effect correction) method.
OPC techniques may be classified as model-based OPC techniques and rule-based OPC techniques. A typical model-based OPC technique corrects the circuit pattern of the mask by applying a single model to a full chip on the wafer. The accuracy of the correction achieved may be high, but a large amount of computation may be needed. A typical rule-based OPC technique corrects the circuit pattern of the mask by applying a single rule to a full chip on the wafer. The amount of computation required may be small, but accuracy of correction may be low.
In some conventional rule-based OPC techniques, a design rule of a circuit pattern is decided and then a full chip is laid out according to the design rule. Subsequently, a correction amount corresponding to a line width and a space width of each circuit pattern is calculated, and each circuit pattern may be corrected based on the calculated correction amount. A mask is fabricated based on the circuit pattern corrected by the OPC (hereinafter, referred to as “OPC circuit pattern), and a desired circuit pattern is transferred to a wafer using the fabricated mask.
In some conventional rule-based OPC processes, the rule-based OPC is performed after the full chip layout is completed. In such a conventional rule-based OPC, the layout of the circuit pattern is fixed at a step of laying out a full chip. Thus, when a defect occurs in the step of laying out a full chip, the OPC may be performed without the defect being repaired. Consequently, the OPC circuit pattern may still have the defect, which may make it unusable for obtaining a target circuit pattern. Moreover, because the OPC is performed, after the layout of the circuit pattern of the mask is fixed, it may not be possible to change or amend the layout. Furthermore, a conventional, rule-based OPC process may be limited in detecting, through experiments and the like, a portion where a process window for a semiconductor device, such as a memory device, is weak.